MIPI Alliance launch I3C Basic v1.2 for Mobile, IoT and Datacenter
MIPI Alliance launch I3C Basic v1.2 for Mobile, IoT and Datacenter
The MIPI Alliance has introduced MIPI I3C Basic v1.2, a scalable utility and control bus that connects peripherals to a microcontroller or an application processor, simplifying integration and improving cost efficiency. The v1.2 spec is reorganized to clearly separate mandatory from optional features so implementers can choose what fits their use case.
MIPI I3C Basic is a royalty-free, rich subset of the member version of MIPI I3C. First unveiled in 2016 and significantly advanced to v1.1 in 2019, I3C builds on the familiar strengths of I2C, SPI and UART while easing implementation, boosting performance and power efficiency, and removing long-standing developer pain points.
The standard has driven broad industry collaboration: PCI-SIG and NVM Express use it as a system management bus (SMBus); JEDEC applies it in its sideband bus and DDR5 standard; ETSI leverages it in the Smart Secure Platform (SSP) and UICC; and it is a focus of a liaison with DMTF (Distributed Management Task Force).
MIPI I3C uses standard CMOS I/O with a two-wire interface and in-band interrupts, cutting pin count and signal paths to lower complexity and raise design flexibility. Typical throughput is 11.1 Mbps, with high-data-rate modes up to 100 Mbps—delivering major gains over legacy interfaces.
Key use cases include peripheral-to-processor links in mobile and embedded devices, system debug and trace, and control sideband roles for DDR5 DRAM, SSD control paths, and the MIPI Camera Control Interface (CCI).
Expanding MIPI I3C Ecosystem
Adoption keeps accelerating as companies and developer communities tap I3C/I3C Basic for flexibility, resilience and design benefits.
The ecosystem spans microcontrollers, microprocessing units, wireless IoT SoCs, sensors and specialty ICs. A wide toolchain supports development and test—from protocol analyzers and development boards to USB host adapters. Drivers exist for Linux and the Zephyr RTOS, and vendors provide reference implementations for their products.
MIPI members integrating MIPI I3C include: Binho LLC; Boréas Technologies Inc.; Diodes Inc.; Microchip Technology; Montage Technology Co. Ltd; NXP Semiconductors; Prodigy Technovations Pvt. Ltd.; Renesas Electronics Corp.; Robert Bosch GmbH; SmartDV Technologies India Private Ltd; STMicroelectronics; Synopsys Inc.; TDK InvenSense; Teledyne LeCroy; Texas Instruments Inc.; and others.
“The MIPI I3C ecosystem has grown rapidly over the past few years, and we expect this rapid adoption to persist,” said Hezi Saar, chair of MIPI Alliance. “Companies have embraced the I3C interface for its innovative features and substantial improvements in performance and power efficiency compared with legacy interfaces. I3C offers developers exceptional flexibility, making it suitable for a diverse range of products, from smartphones and wearables to data center systems.”
MIPI I3C Developer Support and Resources
To help implementers, MIPI provides a Discovery and Configuration (DisCo) spec for I3C, an I3C Host Controller Interface (MIPI I3C HCI), a Transfer Command Response Interface (MIPI I3C TCRI), and a Debug Over I3C specification—all publicly available. An I3C HCI driver is in the Linux kernel, and an I3C Conformance Test Suite is available. The new I/O Bridges Working Group is developing an “I/Os over I3C” bridge spec, targeted for completion in mid-2026. Updated FAQs and application notes aligned to I3C/I3C Basic v1.2 will be downloadable soon from the I3C webpage. In late June, MIPI hosted an I3C/I3C Basic Plugfest in Warsaw alongside MIPI Member Meeting #69, where participants from nine companies performed interoperability testing between controller and target devices.
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About MIPI Alliance
The MIPI Alliance is a global industry consortium that develops interface specifications for mobile and mobile-influenced devices, enabling seamless integration between components while improving performance, power efficiency, and cost-effectiveness. Founded in 2003, MIPI—short for Mobile Industry Processor Interface—brings together member companies from across the semiconductor, device manufacturing, and technology ecosystem.
MIPI specifications are designed to standardize high-speed and control interfaces between processors and peripherals such as cameras, displays, sensors, and modems. These standards are widely adopted in smartphones, tablets, wearables, automotive systems, Internet of Things (IoT) devices, and emerging markets like augmented reality (AR) and virtual reality (VR).
The alliance’s work covers a broad range of interface protocols, including camera interfaces (MIPI CSI), display interfaces (MIPI DSI), debug and trace interfaces, and control/data buses such as MIPI I3C. These specifications are developed collaboratively to ensure interoperability across different vendors’ components, reducing design complexity and time to market.
With hundreds of member organizations worldwide, including leading chipmakers, device manufacturers, and IP providers, MIPI Alliance plays a pivotal role in setting the foundation for connected, high-performance electronics. Its open and royalty-free specifications, such as MIPI I3C Basic, have influenced designs in mobile, automotive, IoT, and data center applications.
Featured Image Source: MIPI Alliance
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